Along with progress of higher integration of semiconductor devices, there is a demand for an exposure technique which can form finer patterns and a new exposure technique is being developed. Currently, in an optical exposure technique used for manufacturing state-of-the-art semiconductor devices, light from an ArF light source is used. However, since the wavelength of this light is long, formation of a pattern having a line width of 20 nm or less is difficult even when various techniques for improving resolution are used.
An exposure technique using a charged particle beam has an advantage that, since a diffracted wavelength of the charged particle beam is extremely short, the resolution is essentially high. However, this technique has the following problem. Since it is difficult to obtain a charged particle beam of a sufficient intensity while maintaining high resolution, a practical processing speed cannot be obtained when a fine circuit pattern of a semiconductor device in which an area of a portion to be exposed is large is directly drawn only by using the charged particle beam.
A multi-beam exposure technique is being developed to improve the processing speed of exposure using the charged particle beam. A charged particle beam passes through an aperture array to be divided into a plurality of beams, and the divided beams are independently blanked with a blanker array. This is an exposure technique of forming patterns by independently turning on/off the charged particle beams for irradiating pixels assumed to be provided on an entire exposure surface of a semiconductor wafer at regular intervals as shown in U.S. Pat. No. 7,276,714 and Japanese Laid-open Patent Publication No. 2013-93566.
Meanwhile, a complementary lithography is proposed which complementarily uses the charged particle beam exposure technique and an immersion light exposure technique using the ArF light source.
In the complementary lithography, first, a simple line-and-space pattern is formed by using methods such as double patterning in immersion light exposure using the ArF light source. It is known that, in a case of a line-and-space pattern whose line width and pitch are determined in a vertical direction or a horizontal direction, a pattern having a line width of 10 nm or less can be formed in light exposure by using the double patterning technique and the like together. Then, cut patterns for cutting line patterns and via patterns for connecting the line patterns to one another are formed by using the charged particle beams.
In the complementary lithography, the area of the portion where the exposure is performed by using the charged particle beams is limited to approximately several percent of the area of the entire pattern including the line patterns. Accordingly, the exposure can be completed by irradiating the exposure surface of the semiconductor wafer with charged particles in a total amount of exposure far less than that in the case where the entire pattern including the line patterns is exposed by using only the charged particle beams, and the throughput can be improved by a degree corresponding to the reduced exposure amount.